Semiconductor device package mold flow control system and method
US12062625B2 · kind B2 · utility
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19Claims
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Key dates
| Filing date | Sep 30, 2021 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Feb 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3862
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate having a top planar surface and a semiconductor die mounted on the top planar surface of the substrate. Bond wires electrically connect the semiconductor die to the substrate. Flow control dams are integrally formed with the top planar surface of the substrate and each flow control dam protrudes from the top planar surface of the substrate at a location proximate to the bond wires. The flow control dams reduce the occurrence of wire sweep in the bond wires electrically connected to the substrate and semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.