Selective silicon etch for gate all around transistors
US12062708B2 · kind B2 · utility
0Cited by
5References
10Claims
0Family size
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Key dates
| Filing date | Oct 18, 2022 |
| Grant date | Aug 13, 2024 |
| Priority date | — |
| Expiry date | Oct 18, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/83
Abstract
Horizontal gate-all-around devices and methods of manufacturing same are described. The hGAA devices comprise a trimmed semiconductor material between source regions and drain regions of the device. The method includes selectively isotropically etching semiconductor material layers between source regions and drain regions of an electronic device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.