Configuration of base clock frequency of processor based on usage parameters
US12066853B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2023 |
| Grant date | Aug 20, 2024 |
| Priority date | — |
| Expiry date | Jun 5, 2043 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing device includes a plurality of processing cores, a control register, associated with a first processing core of the plurality of processing cores, to store a first base clock frequency value at which the first processing core is to run, and a power management circuit to receive a base clock frequency request comprising a second base clock frequency value, store the second base clock frequency value in the control register to cause the first processing core to run at the second base clock frequency value, and expose the second base clock frequency value on a hardware interface associated with the power management circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.