Three-dimensional memory devices and methods for forming the same

US12069854B2 · kind B2 · utility

Assignee

• YANGTZE MEMORY TECHNOLOGIES CO., LTD. · CN

Inventors

• Kun Zhang · Hubei, CN
• Yuancheng Yang · Hubei, CN
• Wenxi Zhou · 红钢城街道, CN
• Wei Liu · 红钢城街道, CN
• Zhiliang Xia · 红钢城街道, CN
• Liang Chen · 红钢城街道, CN
• Yanhong Wang · Beijing, CN

Key dates

• Filing date: Sep 21, 2021
• Grant date: Aug 20, 2024
• Expiry date: Nov 10, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2225/06541
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

In certain aspects, a three-dimensional (3D) memory device includes a first semiconductor structure, a second semiconductor structure, and a bonding interface between the first semiconductor structure and the second semiconductor structure. The first semiconductor structure includes a first semiconductor layer, an array of NAND memory strings, and a first peripheral circuit of the array of NAND memory strings. Sources of the array of NAND memory strings are in contact with a first side of the first semiconductor layer. The first peripheral circuit includes a first transistor in contact with a second side of the first semiconductor layer opposite to the first side. The second semiconductor structure includes a second semiconductor layer and a second peripheral circuit of the array of NAND memory strings. The second peripheral circuit includes a second transistor in contact with the second semiconductor layer.