Gradient doping epitaxy in superjunction to improve breakdown voltage
US12074196B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 8, 2021 |
| Grant date | Aug 27, 2024 |
| Priority date | — |
| Expiry date | Aug 22, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/66
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of processing a substrate are provided herein. In some embodiments, a method of processing a substrate includes: depositing, via a first epitaxial growth process, an n-doped silicon material onto a substrate to form an n-doped layer while adjusting a ratio of dopant precursor to silicon precursor so that a dopant concentration of the n-doped layer increases from a bottom of the n-doped layer to a top of the n-doped layer; etching the n-doped layer to form a plurality of trenches having sidewalls that are tapered and a plurality of n-doped pillars therebetween; and filling the plurality of trenches with a p-doped material via a second epitaxial growth process to form a plurality of p-doped pillars.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.