Method of improving read current stability in analog non-volatile memory by post-program tuning for memory cells exhibiting random telegraph noise
US12080355B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 21, 2021 |
| Grant date | Sep 3, 2024 |
| Priority date | — |
| Expiry date | Oct 23, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device and method for a non-volatile memory cell having a gate that includes programming the memory cell to an initial program state corresponding to a target read current and a threshold voltage, including applying a program voltage having a first value to the gate, storing the first value in a memory, reading the memory cell in a first read operation using a read voltage applied to the gate that is less than the target threshold voltage to generate a first read current, and subjecting the memory cell to additional programming in response to determining that the first read current is greater than the target read current. The additional programming includes retrieving the first value from the memory, determining a second value greater than the first value, and programming the selected non-volatile memory cell that includes applying a program voltage having the second value to the gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.