Semiconductor device and method of manufacture
US12080553B2 · kind B2 · utility
0Cited by
7References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2021 |
| Grant date | Sep 3, 2024 |
| Priority date | — |
| Expiry date | Apr 8, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/501
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Structures and methods of forming semiconductor devices are presented in which a void-free core-shell hard mask is formed over a gate electrode. The void-free core-shell hard mask may be formed in some embodiments by forming a first liner layer over the gate electrode, forming a void-free material over the first liner layer, recessing the void-free material, and forming a second liner over the recessed void-free material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.