Additively manufactured structures for heat dissipation from integrated circuit devices
US12080620B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2020 |
| Grant date | Sep 3, 2024 |
| Priority date | — |
| Expiry date | Oct 18, 2042 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB33Y80/00
- WIPO fieldOther special machines
- WIPO sectorMechanical engineering
Abstract
An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a backside metallization layer on the backside surface of the integrated circuit device, wherein the backside metallization layer comprises a bond layer on the backside surface of the integrated circuit device, a high thermal conductivity layer on the bond layer, and a cap layer on the high thermal conductivity layer. The bond layer may be a layered stack comprising an adhesion promotion layer on the backside of the integrated circuit device and at one least metal layer. The high thermal conductivity layer may be an additively deposited material having a thermal conductivity greater than silicon, such as copper, silver, aluminum, diamond, silicon carbide, boron nitride, aluminum nitride, and combinations thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.