Tag and data configuration for fine-grained cache memory
US12099723B2 · kind B2 · utility
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Key dates
| Filing date | Sep 29, 2022 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Dec 9, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/507
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for operating a memory having a plurality of banks accessible in parallel, each bank including a plurality of grains accessible in parallel is provided. The method includes: based on a memory access request that specifies a memory address, identifying a set that stores data for the memory access request, wherein the set is spread across multiple grains of the plurality of grains; and performing operations to satisfy the memory access request, using entries of the set stored across the multiple grains of the plurality of grains.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.