Microelectronic devices, and related memory devices and electronic systems
US12101932B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 2021 |
| Grant date | Sep 24, 2024 |
| Priority date | — |
| Expiry date | Oct 6, 2042 |
Classification
- Technology area (CPC B)Performing Operations; Transporting
- CPC primaryB81B2201/07
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microelectronic device comprises a stack structure, first digit lines, second digit lines, and multiplexer devices. The stack structure comprises an access line region comprising a lower group of conductive structures, and a select gate region overlying the access line region and comprising an upper group of conductive structures. The first digit lines are coupled to strings of memory cells, and the second digit lines are coupled to additional strings of memory cells. The second digit lines are horizontally offset from the first digit lines in a first direction and are substantially horizontally aligned with the first digit lines in a second direction. The multiplexer devices are coupled to page buffer devices, the first digit lines, and the second digit lines. The multiplexer devices comprise transistors in electrical communication with the upper group of conductive structures. Additional microelectronic devices, memory devices, and electronic systems are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.