Patent · US Active

Device with data processing engine array that enables partial reconfiguration

US12105667B2 · kind B2 · utility

0Cited by

38References

20Claims

0Family size

Assignee

XILINX, INC. · US

Inventors

Juan J. Noguera Serra · San Jose, US
Sneha Bhalchandra Date · Santa Clara, US
Jan Langer · Chemnitz, DE
Baris Ozgul · Dublin, IE
Goran H K Bilski · Mölndal, SE

Key dates

Filing date	Feb 27, 2023
Grant date	Oct 1, 2024
Priority date	—
Expiry date	Apr 22, 2043

Classification

Technology area (CPC G)Physics
CPC primaryG06F9/4411
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A device may include a processor system and an array of data processing engines (DPEs) communicatively coupled to the processor system. Each of the DPEs includes a core and a DPE interconnect. The processor system is configured to transmit configuration data to the array of DPEs, and each of the DPEs is independently configurable based on the configuration data received at the respective DPE via the DPE interconnect of the respective DPE. The array of DPEs enable, without modifying operation of a first kernel of a first subset of the DPEs of the array of DPEs, reconfiguration of a second subset of the DPEs of the array of DPEs.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.