Transistor with ohmic contacts
US12113114B2 · kind B2 · utility
0Cited by
7References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 22, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Nov 5, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/21139
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A transistor includes a semiconductor layer and a channel region. The transistor further includes a first doped contact region in the semiconductor layer and adjacent the channel region. The transistor further includes a first ohmic contact including an interface region comprising a first interface length between the first ohmic contact and the first doped contact region larger than a length of the interface region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.