Enhancing gapfill performance of dram word line
US12114488B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Aug 20, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/053
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
Methods of forming memory devices are described. A molybdenum silicide nucleation layer is formed, and the substrate is soaked in a titanium precursor prior to a bulk molybdenum gap fill process. In other embodiments, a molybdenum silicide film is formed in a first process cycle and a second process cycle is performed where the substrate is exposed to a titanium precursor. In further embodiments, a substrate having at least one feature thereon is exposed to a first titanium precursor and a nitrogen-containing reactant. The substrate is then soaked in a second titanium precursor, and then is exposed to a first molybdenum precursor followed by exposure to a silane to form a molybdenum silicide layer on a surface of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.