Vertical access line in a folded digitline sense amplifier
US12114489B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 2, 2021 |
| Grant date | Oct 8, 2024 |
| Priority date | — |
| Expiry date | Jul 8, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/404
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure includes apparatuses and methods for vertical access line in a folded digitline sense amplifier. An example apparatus includes an array of memory cells. The memory cells form active areas having adjacent access devices, each access device having a first source/drain region and a second source/drain region separated by a channel region and a gate opposing the channel region. A pair of adjacent memory cells can share a digitline contact at the second source/drain region. A storage node contact can be coupled to respective first source/drain regions and each gate can be connected to vertically oriented access lines formed on opposing side of a depletion region to each access device. An insulator material can be patterned between adjacent digitlines to isolate adjacent memory cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.