Inventor · Boise, ID, US

Anton P. Eppich

16Patents
4h-index
1Co-inventors
46Inventor score

Filing activity: Sep 1, 2004 → Dec 2, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US7349232B2 6F2 DRAM cell design with 3F-pitch folded digitline sense amplifier Electricity 65 Active
US7042047B2 Memory cell, array, device and system with overlapping buried digit line and active area and method for forming same Electricity 29 Expired
US7271057B2 Memory array with overlapping buried digit line and active area and method for forming same Electricity 16 Expired
US7915116B2 Relaxed-pitch method of aligning active area to digit line Electricity 7 Active
US7825452B2 Memory cell with buried digit line Electricity 3 Active
US7541632B2 Relaxed-pitch method of aligning active area to digit line Electricity 3 Expired
US7961292B2 Sub-resolution assist devices and methods Physics 2 Active
US8952437B2 DRAM cell design with folded digitline sense amplifier Electricity 2 Active
US8736811B2 Sub-resolution assist devices and methods Physics 1 Active
US8354317B2 Relaxed-pitch method of aligning active area to digit line Electricity 1 Active
US11264320B1 Integrated assemblies Physics 1 Active
US8716772B2 DRAM cell design with folded digitline sense amplifier Electricity 1 Active
US8183615B2 Memory cell with a vertically oriented transistor coupled to a digit line and method of forming the same Electricity 0 Active
US9128383B2 Sub-resolution assist devices and methods Physics 0 Active
US12114489B2 Vertical access line in a folded digitline sense amplifier Physics 0 Active
US7613025B2 Dram cell design with folded digitline architecture and angled active areas Electricity 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.