Wafer inspection system
US12117485B2 · kind B2 · utility
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6References
1Claims
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Assignee
Inventors
Key dates
| Filing date | Aug 9, 2023 |
| Grant date | Oct 15, 2024 |
| Priority date | — |
| Expiry date | Aug 9, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/68742
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A wafer inspection system is provided. The wafer inspection system includes: a transfer region in which a transfer device is arranged; an inspection region in which test heads for inspecting a substrate are arranged; and a maintenance region in which the test heads are maintained. The inspection region is located between the transfer region and the maintenance region, a plurality of inspection rooms accommodating the test heads are adjacent to each other in the inspection region, and the test heads are configured to be unloaded from the inspection region to the maintenance region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.