Magnetoresistive random access memory and method for fabricating the same
US12127413B2 · kind B2 · utility
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Key dates
| Filing date | Feb 23, 2023 |
| Grant date | Oct 22, 2024 |
| Priority date | — |
| Expiry date | Feb 23, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N50/80
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a first magnetic tunneling junction (MTJ) and a second MTJ on a substrate, a first ultra low-k (ULK) dielectric layer on the first MTJ and the second MTJ, a passivation layer on the first ULK dielectric layer, and a second ULK dielectric layer on the passivation layer. Preferably, the first ULK dielectric layer includes a first thickness, the passivation layer between the first MTJ and the second MTJ includes a second thickness, the passivation layer on top of the first MTJ includes a third thickness, and the second thickness is greater than the third thickness
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.