Semiconductor substrate support leveling apparatus
US12131934B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2020 |
| Grant date | Oct 29, 2024 |
| Priority date | — |
| Expiry date | May 19, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04Q2209/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Exemplary semiconductor processing systems may include a chamber body including sidewalls and a base. The chamber body may define an interior volume. The systems may include a substrate support extending through the base of the chamber body. The substrate support may be configured to support a substrate within the interior volume. The systems may include a faceplate positioned within the interior volume of the chamber body. The faceplate may define a plurality of apertures through the faceplate. The systems may include a leveling apparatus seated on the substrate support. The leveling apparatus may include a plurality of piezoelectric pressure sensors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.