Chip package with near-die integrated passive device
US12136613B2 · kind B2 · utility
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4References
20Claims
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Assignee
Inventors
Key dates
| Filing date | Feb 10, 2022 |
| Grant date | Nov 5, 2024 |
| Priority date | — |
| Expiry date | Nov 16, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19103
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package and method for fabricating the same are provided that includes a near-die integrated passive device. The near-die integrated passive device is disposed between a package substrate and an integrated circuit die of a chip package. Some non-exhaustive examples of an integrated passive device that may be disposed between the package substrate and the integrated circuit die include a resistor, a capacitor, an inductor, a coil, a balum, or an impedance matching element, among others.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.