Stress treatments for cover wafers
US12142468B2 · kind B2 · utility
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2References
19Claims
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Key dates
| Filing date | Aug 30, 2021 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Aug 3, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J2237/335
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
Exemplary methods of manufacturing a semiconductor cover wafer may include sintering aluminum nitride particles into a substrate characterized by a thickness and characterized by a disc shape. The methods may include grinding a surface of the substrate to reduce the thickness to less than or about 2 mm. The methods may include polishing the surface of the substrate to reduce a roughness. The methods may include annealing the substrate at a temperature of greater than or about 800° C. for a time period of greater than or about 60 minutes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.