Sequential plasma and thermal treatment
US12142475B2 · kind B2 · utility
0Cited by
17References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 9, 2022 |
| Grant date | Nov 12, 2024 |
| Priority date | — |
| Expiry date | Jul 14, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of manufacturing memory devices are provided. The methods improve the quality of a selectively deposited silicon-containing dielectric layer. The method comprises selectively depositing a silicon-containing dielectric layer in a recessed region of a film stack. The selectively deposited silicon-containing dielectric layer is then exposed to a high-density plasma and annealed at a temperature greater than 800 ° C. to provide a silicon-containing dielectric film having a wet etch rate of less than 4 Å/min.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.