Semiconductor device and corresponding method
US12148628B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 12, 2022 |
| Grant date | Nov 19, 2024 |
| Priority date | — |
| Expiry date | Mar 31, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/0603
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A leadframe includes a die pad and a set of electrically conductive leads. A semiconductor die, having a front surface and a back surface opposed to the front surface, is arranged on the die pad with the front surface facing away from the die pad. The semiconductor die is electrically coupled to the electrically conductive leads. A package molding material is molded over the semiconductor die arranged on the die pad. A stress absorbing material contained within a cavity delimited by a peripheral wall on the front surface of the semiconductor die is positioned intermediate at least one selected portion of the front surface of the semiconductor die and the package molding material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.