High capacitance MIM device with self aligned spacer

US12154939B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Ching-Sheng Chu · Baoshan, TW
• Dun-Nian Yaung · Taipei, TW
• Yu-Cheng Tsai · Tainan, TW
• Meng-Hsien Lin · Tainan, TW
• Ching-Chung Su · Tainan, TW
• Jen-Cheng Liu · Baoshan, TW
• Wen-De Wang · Guoxing Township, TW
• Guan-Hua Chen · Gyirong County, CN

Key dates

• Filing date: Jul 28, 2023
• Grant date: Nov 26, 2024
• Expiry date: Jul 28, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/68

Abstract

The present disclosure, in some embodiments, relates to a metal-insulator-metal (MIM) capacitor structure. The MIM capacitor structure includes one or more lower interconnects disposed within a lower dielectric structure over a substrate. A first dielectric layer is over the lower dielectric structure and includes sidewalls defining a plurality of openings extending through the first dielectric layer. A lower electrode is arranged along the sidewalls and over an upper surface of the first dielectric layer, a capacitor dielectric is arranged along sidewalls and an upper surface of the lower electrode, and an upper electrode is arranged along sidewalls and an upper surface of the capacitor dielectric. A spacer is along opposing outermost sidewalls of the upper electrode. The spacer has an outermost surface extending from a lowermost surface of the spacer to a top of the spacer. The outermost surface is substantially aligned with an outermost sidewall of the lower electrode.