Adjusting refresh rate during self-refresh state
US12165690B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2022 |
| Grant date | Dec 10, 2024 |
| Priority date | — |
| Expiry date | Dec 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/023
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods, systems, and devices for adjusting a refresh rate during a self-refresh state are described. A memory system may enter a self-refresh state and execute a first set of refresh operations on a set of rows of memory cells at the memory system according to a first rate. The memory system may determine, based on executing the first set of refresh operations, that a counter associated with the set of refresh operations satisfies a threshold for a second time while the memory system is in the self-refresh state. In response to the counter satisfying the threshold for the second time, a flip-flop circuit at the memory system may modify an output of the flip-flop circuit and the memory system may decrease the rate for executing the refresh operations to a second rate based on the modified output of the flip-flop circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.