Patent · US Active

Method of performing programming operation and related memory device

US12165716B2 · kind B2 · utility

0Cited by
2References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 20, 2022
Grant dateDec 10, 2024
Priority date
Expiry dateMar 1, 2043

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/32
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory device includes a memory array including memory strings, each memory string comprising a plurality of first memory cells, a plurality of second memory cells, and one or more dummy memory cells between the first memory cells and the second memory cells. The first memory cells are between drain terminals of the memory strings and the dummy memory cells, and the second memory cells are between source terminals of the memory strings and the dummy memory cells. The bit lines are respectively coupled to drain terminals of the memory strings. The word lines are respectively coupled to gate terminals of the first memory cells and the second memory cells. A word line driver is configured to apply a first voltage signal to each of the word lines that are coupled to the gate terminals of the first memory cells during a pre-charge phase.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.