Nitride semiconductor device with element isolation area
US12170316B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 20, 2023 |
| Grant date | Dec 17, 2024 |
| Priority date | — |
| Expiry date | Oct 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/257
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes first and second nitride semiconductor layers. The second layer on the first nitride has a first region, a second region, and a third region between the first and second regions. A first gate electrode is in the first region and extends parallel to a surface of a substrate. A first source electrode is in the first region and extends in the first direction. A second gate electrode in the second region and extends in the first direction. A second source electrode is in the second region and extends in the first direction. A drain electrode coupled to a first and a second wiring. The first wiring directly contacts the second nitride semiconductor layer in the first region. The second wiring directly contacts the second nitride semiconductor layer in the second region. An insulation material is in the third region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.