Three-dimensional memory device with improved charge lateral migration and method for forming the same
US12171098B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2021 |
| Grant date | Dec 17, 2024 |
| Priority date | — |
| Expiry date | Jan 20, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A three-dimensional (3D) memory device includes a stack structure and a channel structure. The stack structure includes interleaved conductive layers and dielectric layers. The channel structure extends through the stack structure along a first direction. The channel structure includes a semiconductor channel, and a memory film over the semiconductor channel. The memory film includes a tunneling layer over the semiconductor channel, a storage layer over the tunneling layer, and a blocking layer over the storage layer. The blocking layer and the storage layer are separated by the dielectric layers into a plurality of sections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.