Systems, methods, and apparatuses for tile load, multiplication and accumulation

US12182571B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Robert Valentine · Kiryat Tivon, IL
• Menachem Adelman · Haifa, IL
• Milind B. Girkar · Sunnyvale, US
• Zeev Sperber · Jerusalem, IL
• Mark J. Charney · Lexington, US
• Bret L. Toll · Hillsboro, US
• Rinat Rappoport · Haifa, IL
• Jesus Corbal · King City, US
• Stanislav Shwartsman · Haifa, IL
• Dan Baum · Haifa, IL
• Igor Yanover · Yoqneam Illit, IL
• Alexander Heinecke · San Jose, US
• Barukh Ziv · Haifa, IL
• Elmoustapha Ould-Ahmed-Vall · Chandler, US
• Yuri Gebil · Nahariah, IL
• Raanan Sade · Migdal HaEmek, IL

Key dates

• Filing date: Jan 23, 2023
• Grant date: Dec 31, 2024
• Expiry date: Jan 23, 2043

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F2212/455
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Embodiments detailed herein relate to matrix operations. In particular, the loading of a matrix (tile) from memory. For example, support for a loading instruction is described in the form of decode circuitry to decode an instruction having fields for an opcode, a destination matrix operand identifier, and source memory information, and execution circuitry to execute the decoded instruction to load groups of strided data elements from memory into configured rows of the identified destination matrix operand to memory.