Microelectronic devices including staircase structures, and related memory devices, electronic systems, and methods
US12191249B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2021 |
| Grant date | Jan 7, 2025 |
| Priority date | — |
| Expiry date | Jan 24, 2043 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic device comprises a stack structure overlying a source tier. The stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. The microelectronic device comprises a staircase structure within the stack structure and having steps comprising lateral edges of the tiers, support structures vertically extending through the stack structure and within a horizontal area of the staircase structure, and conductive contacts vertically extending through the stack structure and horizontally neighboring the support structures within the horizontal area of the staircase structure. Each of the conductive contacts has a horizontally projecting portion in contact with one of the conductive structures of the stack structure at one of the steps of the staircase structure. Related memory devices, electronic systems, and methods of forming the microelectronic devices are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.