Data-buffer controller/control-signal redriver
US12211583B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2021 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Jan 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a memory system having multiple memory sockets for removable insertion of memory modules therein, off-module data buffers are disposed in a data signaling data path between a memory control component and the memory sockets, and an off-module buffer controller is disposed in a control signaling path between the memory control component and the memory sockets. The off-module buffer controller receives control signals transmitted by the memory control component and re-drives/re-transmits the control signals to the memory sockets. The off-module buffer controller generates buffer-control signals in response to the control signals and outputs the buffer-control signals to the off-module data buffers to multiplex host-control-component access to the memory sockets.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.