Catherine Chen
15Patents
6h-index
15Co-inventors
63Inventor score
Filing activity: Sep 14, 1999 → Feb 26, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6839266B1 | Memory module with offset data lines and bit line swizzle configuration | Physics | 107 | Expired |
| US6370668B1 | High speed memory system capable of selectively operating in non-chip-kill and chip-kill modes | Physics | 61 | Expired |
| US6708248B1 | Memory system with channel multiplexing of multiple memory devices | Emerging Cross-Sectional Technologies | 56 | Expired |
| US10146608B2 | Memory module register access | Physics | 35 | Active |
| US7039782B2 | Memory system with channel multiplexing of multiple memory devices | Emerging Cross-Sectional Technologies | 22 | Expired |
| US11068161B1 | Memory module with emulated memory device population | Physics | 7 | Active |
| US11809345B2 | Data-buffer component with variable-width data ranks and configurable data-rank timing | Physics | 3 | Active |
| US10789185B2 | Memory modules and systems with variable-width data ranks and configurable data-rank timing | Physics | 3 | Active |
| US11573849B2 | Memory module register access | Physics | 1 | Active |
| US11016837B2 | Memory module register access | Physics | 0 | Active |
| US12211583B2 | Data-buffer controller/control-signal redriver | Physics | 0 | Active |
| US12210467B2 | Memory modules and systems with variable-width data ranks and configurable data-rank timing | Physics | 0 | Active |
| US12298842B2 | Memory module register access | Physics | 0 | Active |
| US11953981B2 | Memory module register access | Physics | 0 | Active |
| US11275702B2 | Memory module and registered clock driver with configurable data-rank timing | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.