Spacer patterning process with flat top profile
US12211693B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Apr 4, 2022 |
| Grant date | Jan 28, 2025 |
| Priority date | — |
| Expiry date | Feb 10, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31116
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a metal containing feature includes performing a deposition process, the deposition process comprising conformally depositing an over layer on top surfaces of a patterned mandrel layer and over a spacer layer on sidewalls of the patterned mandrel layer, and performing an etch process, the etch process comprising removing the over layer from the top surfaces of the patterned mandrel layer and shoulder portions of the spacer layer, and removing the shoulder portions of the spacer layer, using a fluorine containing etching gas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.