Inventor · San Jose, CA, US

Gene Lee

15Patents

5h-index

32Co-inventors

66Inventor score

Filing activity: Mar 5, 1999 → Aug 19, 2022

Most-cited inventions

Patent	Title	Area	Cited by	Status
US6235643A	Method for etching a trench having rounded top and bottom corners in a silicon substrate	Electricity	270	Expired
US6583063B1	Plasma etching of silicon using fluorinated gas mixtures	Electricity	43	Expired
US9299580B2	High aspect ratio plasma etch for 3D NAND semiconductor applications	Electricity	14	Active
US8658541B2	Method of controlling trench microloading using plasma pulsing	Electricity	9	Active
US9595451B1	Highly selective etching methods for etching dielectric materials	Electricity	6	Active
US9054045B2	Method for isotropic etching	Electricity	4	Active
US10636675B2	Methods of etching metal-containing layers	Electricity	3	Active
US11527408B2	Multiple spacer patterning schemes	Electricity	2	Active
US10957558B2	Methods of etching metal-containing layers	Electricity	2	Active
US9852923B2	Mask etch for patterning	Electricity	1	Active
US11315787B2	Multiple spacer patterning schemes	Electricity	0	Active
US11658043B2	Selective anisotropic metal etch	Electricity	0	Active
US12211693B2	Spacer patterning process with flat top profile	Electricity	0	Active
US12266537B2	Selective barrier metal etching	Electricity	0	Active
US12322602B2	Recessed metal etching methods	Electricity	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.