Time to digital converter (TDC) circuit with self-adaptive time granularity and related methods
US12216434B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2022 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | May 31, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/103
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A time-to-digital converter (TDC) circuit generates a digital output indicating a time, known as a phase difference, from a phase of the generated signal to a corresponding phase of a reference signal. The digital output is used by the digitally controlled oscillator (DCO) to correct for the phase/frequency difference to synchronize the generated signal with the reference signal. In an aspect, an adaptive TDC circuit generates a first digital indication in a coarse mode when the offset time is above a threshold and generates a second digital indication in a fine mode when the offset time is below the threshold. The first digital indication and the second digital indication each comprise a same number of bits, and the first digital indication is normalized to the second digital indication for the digital output of the adaptive TDC circuit. A fractional bit may be employed to compensate for a quantization error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.