Method of making an individualization zone of an integrated circuit
US12218083B2 · kind B2 · utility
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1References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2021 |
| Grant date | Feb 4, 2025 |
| Priority date | — |
| Expiry date | Dec 6, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a method for making an individualization zone of a microchip comprising a first (10A) and a second (20A) level of electrical tracks (10, 20), and a conductor layer (30A) comprising via holes (30), the method comprising the following steps:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.