Pixel sensor including a layer stack to reduce and/or block the effects of plasma processing and etching on the pixel sensor

US12218160B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Wei-Lin Chen · Ellicott City, US
• Ching-Chung Su · Tainan, TW
• Chun-Hao Chou · Tainan, TW
• Kuo-Cheng Lee · Tainan, TW

Key dates

• Filing date: Mar 12, 2021
• Grant date: Feb 4, 2025
• Expiry date: May 22, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10F39/8063

Abstract

A pixel sensor may include a layer stack to reduce and/or block the effects of plasma and etching on a photodiode and/or other lower-level layers. The layer stack may include a first oxide layer, a layer having a band gap that is approximately less than 8.8 electron-Volts (eV), and a second oxide layer. The layer stack may reduce and/or prevent the penetration and absorption of ultraviolet photons resulting from the plasma and etching processes, which may otherwise cause the formation of electron-hole pairs in the substrate in which the photodiode is included.