Integrated assemblies and methods of forming integrated assemblies
US12237013B2 · kind B2 · utility
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37Claims
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Key dates
| Filing date | Jul 12, 2021 |
| Grant date | Feb 25, 2025 |
| Priority date | — |
| Expiry date | May 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments include an integrated assembly having a vertical stack of alternating first and second levels. A panel extends through the stack. The first levels have proximal regions adjacent the panel, and have distal regions further from the panel than the proximal regions. The distal regions include conductive structures. The conductive structures have a first thickness. The proximal regions include insulative structures. The insulative structures have a second thickness at least about as large as the first thickness. Some embodiments include methods of forming integrated assemblies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.