Dies, semiconductor package structures, enable pin configuration methods and memories
US12254950B2 · kind B2 · utility
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11Claims
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Key dates
| Filing date | Dec 30, 2022 |
| Grant date | Mar 18, 2025 |
| Priority date | — |
| Expiry date | Apr 15, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06562
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one example, a peripheral circuit in a die is configured to: first, receive control commands, and generate indication information according to the control commands, the control commands being used for indicating the die to determine the address of the die, the indication information being used for indicating M dies to share the same enable pin, M being a positive integer greater than or equal to 1; and then, determine the address of the die according to the indication information, and send the address of the die, the address being used for addressing an enable signal provided by the enable pin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.