Patent · US Active

Fin on silicon-on-insulator

US12261215B2 · kind B2 · utility

0Cited by
6References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 27, 2022
Grant dateMar 25, 2025
Priority date
Expiry dateMay 6, 2043

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/0158

Abstract

A structure is provided, the structure may include an active layer arranged over a buried oxide layer, the active layer having a top surface. The top surface of the active layer may have a first portion and a second portion. A barrier stack may be arranged over the first portion of the top surface of the active layer. The barrier stack may include a barrier layer. The second portion of the top surface of the active layer may be adjacent to the barrier stack. A fin may be spaced from the first portion of the top surface of the active layer by the barrier stack, the fin having a first side surface, a second side surface opposite to the first side surface and a top surface. A dielectric layer may be arranged on the first side surface, the second side surface and the top surface of the fin, and the second portion of the top surface of the active layer. A metal layer may be arranged over the dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.