Method of manufacturing semiconductor structure having hybrid bonding pad
US12266622B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 14, 2022 |
| Grant date | Apr 1, 2025 |
| Priority date | — |
| Expiry date | Oct 17, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/80896
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a method of manufacturing a semiconductor structure. The method includes providing a first semiconductor substrate. The method also includes forming a first conductive pad over the first semiconductor substrate. The method further includes forming a first hybrid bonding pad on the first conductive pad, wherein the first hybrid bonding pad includes nano-twins copper, and a thickness of the first hybrid bonding pad is less than a thickness of the first conductive pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.