Method of manufacturing memory device with first and second isolation members using patterned photoresist layer and energy-decomposable mask
US12278138B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 5, 2022 |
| Grant date | Apr 15, 2025 |
| Priority date | — |
| Expiry date | Oct 31, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B20/25
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present application provides a method of manufacturing a memory device. The method includes steps of providing a semiconductor substrate including an active area disposed over or in the semiconductor substrate; disposing a patterned photoresist layer over the semiconductor substrate; removing a first portion of the semiconductor substrate exposed through the patterned photoresist layer to form a first trench; removing the patterned photoresist layer; forming a first isolation member within the first trench; disposing an energy-decomposable mask over the semiconductor substrate and the first isolation member; irradiating a portion of the energy-decomposable mask with an electromagnetic radiation; removing the portion of the energy-decomposable mask irradiated with the electromagnetic radiation to form a patterned energy-decomposable mask; removing a second portion of the semiconductor substrate exposed through the patterned energy-decomposable mask to form a second trench; removing the patterned energy-decomposable mask; and forming a second isolation member within the second trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.