Patent · US Active

Molded semiconductor package having an embedded inlay

US12283538B2 · kind B2 · utility

0Cited by

1References

17Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Marcus Boehm · Schweinfurt, DE
Michael Fuegl · Dresden, DE
Ludwig Heitzer · Regensburg, DE
Stefan Woetzel · Erfurt, DE

Key dates

Filing date	May 10, 2022
Grant date	Apr 22, 2025
Priority date	—
Expiry date	May 27, 2043

Classification

Technology area (CPC H)Electricity
CPC primaryH01L23/051
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A molded semiconductor package includes: a mold compound; a metal substrate partly embedded in the mold compound; at least one first metal lead partly embedded in the mold compound; an inlay embedded in the mold compound, the inlay comprising a semiconductor die embedded in an electrically insulating body, a first metal structure attached to a first side of the semiconductor die, and a second metal structure attached to a second side of the semiconductor die; and a metal clip at least partly embedded in the mold compound and connecting the second metal structure to the at least one first metal lead. The semiconductor die has a maximum junction temperature higher than a glass transition temperature of the mold compound, the electrically insulating body has a glass transition temperature at or above the maximum junction temperature of the semiconductor die, and the metal substrate is attached to the first metal structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.