Integrated circuit structure
US12283557B2 · kind B2 · utility
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1References
10Claims
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Assignee
Inventors
Key dates
| Filing date | Dec 28, 2023 |
| Grant date | Apr 22, 2025 |
| Priority date | — |
| Expiry date | Dec 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit structure includes an aluminum pad layer on a dielectric stack, a passivation layer covering the aluminum pad layer, and an aluminum shield layer including aluminum routing patterns disposed directly above an embedded memory area and embedded in the dielectric stack. The aluminum shield layer is electrically connected to the uppermost copper layer through a plurality of tungsten vias. The plurality of tungsten vias is embedded in the dielectric stack.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.