High aspect ratio source or drain structures with abrupt dopant profile

US12288808B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ryan Keech · Portland, US
• Anand S. Murthy · Beaverton, US
• Nicholas G. Minutillo · Beaverton, US
• Suresh Vishwanath · Portland, US
• Mohammad HASAN · Beaverton, US
• Biswajeet Guha · Hillsboro, US
• Subrina RAFIQUE · Hillsboro, US

Key dates

• Filing date: Sep 20, 2023
• Grant date: Apr 29, 2025
• Expiry date: Sep 20, 2043

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/014
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Integrated circuit structures having source or drain structures with abrupt dopant profiles are described. In an example, an integrated circuit structure includes a vertical arrangement of horizontal nanowires. A gate stack is around the vertical arrangement of horizontal nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of horizontal nanowires. A second epitaxial source or drain structure is at a second end of the vertical arrangement of horizontal nanowires. The first and second epitaxial source or drain structures include silicon, phosphorous and arsenic, with an atomic concentration of phosphorous substantially the same as an atomic concentration of arsenic.