Semiconductor package
US12293989B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 25, 2022 |
| Grant date | May 6, 2025 |
| Priority date | — |
| Expiry date | Dec 15, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a first redistribution substrate, a lower semiconductor chip on the first redistribution substrate and a through via therein, a first lower conductive structure and a second lower conductive structure that are on the first redistribution substrate and are laterally spaced apart from the lower semiconductor chip, an upper semiconductor chip on the lower semiconductor chip and the second lower conductive structure and coupled to the through via and the second lower conductive structure, and an upper conductive structure on the first lower conductive structure. A width of the second lower conductive structure is greater than a width of the through via.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.