Trench isolation having three portions with different materials, and LDMOS FET including same
US12295161B2 · kind B2 · utility
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3References
19Claims
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Key dates
| Filing date | Jan 24, 2022 |
| Grant date | May 6, 2025 |
| Priority date | — |
| Expiry date | May 24, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An IC structure that includes a trench isolation (TI) in a substrate having three portions of different dielectric materials. The portions may also have different widths. The TI may include a lower portion including a first dielectric material and having a first width, a middle portion including the first dielectric material and an outer second dielectric material, and an upper portion including a third dielectric material and having a second width greater than the first width. The first, second and third dielectric materials are different.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.