Semiconductor package including outer conductive plate
US12300625B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2022 |
| Grant date | May 13, 2025 |
| Priority date | — |
| Expiry date | Jun 26, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73263
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate; and a first semiconductor device and a second semiconductor device that are provided on the substrate. The substrate includes a first dielectric layer and a second dielectric layer provided on the first dielectric layer, a plurality of signal lines provided between the first dielectric layer and the second dielectric layer and connecting the first semiconductor device to the second semiconductor device, and a conductive pad and a conductive plate provided on the second dielectric layer. The conductive pad overlaps the first semiconductor device or the second semiconductor device. The conductive plate overlaps the signal lines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.