Nanosheet transistor devices with different active channel widths
US12310061B2 · kind B2 · utility
0Cited by
9References
20Claims
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Key dates
| Filing date | Sep 25, 2021 |
| Grant date | May 20, 2025 |
| Priority date | — |
| Expiry date | Sep 28, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/0151
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor structure comprises a substrate defining a first axis and a second axis orthogonal to the first axis, a first nanosheet region disposed on the substrate and defining a first channel width along the second axis, a first gate disposed around the first nanosheet region, a second nanosheet region disposed on the substrate and defining a second channel width along the second axis less than the first channel width of the first nanosheet region and a second gate disposed around the second nanosheet region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.