Patent · US Active

Methods of forming 3D NAND structures with decreased pitch

US12317493B2 · kind B2 · utility

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2References
20Claims
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Key dates

Filing dateNov 28, 2022
Grant dateMay 27, 2025
Priority date
Expiry dateDec 30, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/693

Abstract

Methods of forming 3D NAND devices are discussed. Some embodiments form 3D NAND devices with increased cell density. Some embodiments form 3D NAND devices with decreased vertical and/or later pitch between cells. Some embodiments form 3D NAND devices with smaller CD memory holes. Some embodiments form 3D NAND devices with silicon layer between alternating oxide and nitride materials.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.