Semiconductor device and manufacturing method thereof
US12324168B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2022 |
| Grant date | Jun 3, 2025 |
| Priority date | — |
| Expiry date | Sep 21, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a substrate, a high-Q capacitor, an ultra high density capacitor, and an interconnection. At least one trench is formed in the substrate. The high-Q capacitor is disposed on a surface of the substrate, and includes a bottom electrode, an upper electrode located on the bottom electrode, and a first dielectric layer located between the upper and bottom electrodes. The ultra high density capacitor is disposed on the trench of the substrate, and includes a first electrode conformally deposited in the trench, a second electrode located on the first electrode, and a second dielectric layer located between the first and second electrodes. The interconnection connects one of the upper electrode and the bottom electrode to one of the first electrode and the second electrode, and connects the other of the upper electrode and the bottom electrode to the other of the first electrode and the second electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.